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DTSTART:19700308T020000
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DTSTART:19701101T020000
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BEGIN:VEVENT
DTSTAMP:20260422T000713Z
LOCATION:201-203
DTSTART;TZID=America/Denver:20231115T103000
DTEND;TZID=America/Denver:20231115T120000
UID:submissions.supercomputing.org_SC23_sess190_pan106@linklings.com
SUMMARY:Superconducting Digital Computing in HPC
DESCRIPTION:George Michelogiannakis (Lawrence Berkeley National Laboratory
  (LBNL), Stanford University); Massoud Pedram (University of Southern Cali
 fornia (USC)); Rick Stevens (Argonne National Laboratory (ANL)); John Shal
 f (Lawrence Berkeley National Laboratory); Anna Herr (Interuniversity Micr
 oelectronics Centre (IMEC)); and John Sirevicius (University of Maryland, 
 Laboratory for Physical Sciences (LPS))\n\nSuperconducting digital computi
 ng (SDC) has significant potential to preserve performance scaling for a w
 ide range of HPC applications due to its tens to hundreds of GHz operating
  frequencies coupled with low dynamic energy. The current limitations of t
 he technology such as device density, EDA tools, data movement, and coolin
 g are active areas of research with promising directions. This, combined w
 ith studies that designed SDC accelerators for compute-intensive applicati
 ons, hint that SDC may play an important role in HPC, though significant w
 ork remains to show the best integration strategy with HPC systems and on-
 sensor processing. In this panel, we invite experts from the superconducti
 ng community to discuss SDC’s ecosystem, how SDC may be used in practice i
 n future systems, and the positive impact SDC can have to the performance 
 and efficiency of key HPC applications.\n\nTag: Codesign, Hardware Technol
 ogies\n\nRegistration Category: Tech Program Reg Pass\n\nSession Chair: Ge
 orge Michelogiannakis (Lawrence Berkeley National Laboratory (LBNL), Stanf
 ord University)\n\n
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