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RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0600
TZOFFSETTO:-0700
TZNAME:MST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260422T000712Z
LOCATION:201-203
DTSTART;TZID=America/Denver:20231115T153000
DTEND;TZID=America/Denver:20231115T170000
UID:submissions.supercomputing.org_SC23_sess191_pan107@linklings.com
SUMMARY:Chiplet Ecosystem in High Performance Computing, AI/ML, and Data A
 cceleration
DESCRIPTION:Bapi Vinnakota (Lawrence Berkeley National Laboratory (LBNL)),
  LK Bhupathi (Ayar Labs), Gabriel Loh (AMD Research), Keren Bergman (Colum
 bia University), Nicholas Ilyadis (Achronix Semiconductor Corporation), an
 d John Shalf (Lawrence Berkeley National Laboratory (LBNL))\n\nChiplets ha
 ve become a compelling approach to incorporating specialization and massiv
 e bandwidth into compute and memory devices used in HPC.  But there are ma
 ny challenges in realizing the vision for affordable modular HPC using adv
 anced packaging technology.  We bring together a diverse panel of experts 
 for a discussion on whether there will be an ecosystem or marketplace of C
 hiplets that will be available for system developers to use to build next 
 generation devices and weigh the pros and cons of off-the-shelf Chiplets v
 s custom designed Chiplets.  Chiplets could be processors, GPUs, Networkin
 g interfaces, optical engines, memory controllers, or FPGAs.\n\nTag: Artif
 icial Intelligence/Machine Learning, Codesign, Heterogeneous Computing\n\n
 Registration Category: Tech Program Reg Pass\n\nSession Chair: Bapi Vinnak
 ota (Lawrence Berkeley National Laboratory (LBNL))\n\n
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