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DTSTART;TZID=America/Denver:20231112T145000
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UID:submissions.supercomputing.org_SC23_sess436_ws_ia105@linklings.com
SUMMARY:A New Sparse GEneral Matrix-Matrix Multiplication Method for Long 
 Vector Architecture by Hierarchical Row Merging
DESCRIPTION:Hikaru Takayashiki, Hotaka Yagi, Hiroki Nishimoto, and Naoki Y
 oshifuji (Fixstars Corporation)\n\nVector processors have become essential
  to high-performance computing in scientific and engineering applications,
  especially in numerical calculations that leverage data parallelism.  Wit
 h escalating computational demands, the efficient execution of Sparse GEne
 ral Matrix-matrix Multiplication (SpGEMM) on vector processors has become 
 crucial.  However, it brings challenges for vector processors due to its c
 omplex data structures and irregular memory access patterns.\n\nWe present
  a new method designed to perform SpGEMM on vector processors, inspired by
  Iterative Row Merging.  The proposed method hierarchically merges rows by
  utilizing long vector instructions.  We evaluate the proposed method agai
 nst other methods across 27 sparse matrices.  The results indicate that th
 e proposed method outperforms other methods for 22 out of the 27 sparse ma
 trices, reaching up to 31.9 times better performance in the best case.  Fu
 rthermore, we compare with the GPU implementation that inspired our propos
 ed method, using the same generation of GPUs.\n\nTag: Algorithms, Applicat
 ions, Architecture and Networks\n\nRegistration Category: Workshop Reg Pas
 s\n\nSession Chairs: Sanjukta Bhowmick (University of North Texas), Vito G
 iovanni Castellana (Pacific Northwest National Laboratory (PNNL)), John Fe
 o (Pacific Northwest National Laboratory (PNNL)), Marco Minutoli (Advanced
  Micro Devices), and Antonino Tumeo (Pacific Northwest National Laboratory
  (PNNL))\n\n
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