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DTSTART;TZID=America/Denver:20231112T163400
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UID:submissions.supercomputing.org_SC23_sess437_misc290@linklings.com
SUMMARY:Invited Talk:  When Optimizing Software Produces Optimized Hardwar
 e – A Case for Statically-Interpretable Control-Flow Programs
DESCRIPTION:Louis-Noel Pouchet (Colorado State University)\n\nNowadays, po
 werful optimizing compilers are needed to transform and specialize softwar
 e for a particular machine, for performance and energy considerations. For
  example, compilers for High-level synthesis (HLS) can greatly facilitate 
 the description of complex hardware implementations, by raising the level 
 of abstraction to a classical imperative language such as C/C++, usually a
 ugmented with vendor-specific pragmas and APIs. Software is being used to 
 describe hardware, but despite productivity improvements attaining high pe
 rformance for the final designs remains a challenge: many crucial optimiza
 tions require substantial changes in control-flow structure, I/O approach,
  on-chip buffer management, function boundaries, exposing concurrency, etc
 . \n\nIn this talk, we discuss techniques and tools to assist with the dev
 elopment of optimized software, and optimized hardware using HLS. By speci
 alizing the compilation process to a specific class of programs, those who
 se control flow and dataflow can be exactly computed by means of interpret
 ation at compile-time (e.g., many deep learning applications), we can for 
 instance develop advanced code generation techniques for a class of sparse
  computation, powerful source-to-source transformations for better hardwar
 e designs via HLS, and verify the correctness of these optimized programs 
 automatically.\n\nTag: Accelerators, Codesign, Heterogeneous Computing, Ta
 sk Parallelism\n\nRegistration Category: Workshop Reg Pass\n\nSession Chai
 rs: Tong Shu (University of North Texas), Seung-Hwan Lim (Oak Ridge Nation
 al Laboratory (ORNL)), Pavan Balaji (Meta AI), and Sanjukta Bhowmick (Univ
 ersity of North Texas)\n\n
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