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DTSTART:19700308T020000
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DTSTAMP:20260422T000711Z
LOCATION:605
DTSTART;TZID=America/Denver:20231113T112500
DTEND;TZID=America/Denver:20231113T114400
UID:submissions.supercomputing.org_SC23_sess441_ws_p3hpc110@linklings.com
SUMMARY:Evaluating the Performance Portability of SYCL across CPUs and GPU
 s on Bandwidth-Bound Applications
DESCRIPTION:István Z. Reguly (Pázmány Péter Catholic University, Hungary)\
 n\nWe evaluate the portability of the SYCL programming model on some of th
 e latest CPUs and GPUs from a wide range of vendors, utilizing the two mai
 n compilers: DPC++ and hipSYCL/OpenSYCL. Both compilers currently support 
 GPUs from all three major vendors; we evaluate performance on the Intel(R)
  Data Center GPU Max 1100, the NVIDIA A100 GPU, and the AMD MI250X GPU. Su
 pport on CPUs currently is less established, with DPC++ only supporting In
 tel CPUs through OpenCL, however, OpenSYCL does have an OpenMP backend cap
 able of targeting all modern CPUs; we benchmark the Intel Xeon Platinum 83
 60Y Processor (Ice Lake), the AMD EPYC 7V73X (Milan-X), and the Ampere Alt
 ra platforms. We study a range of primarily bandwidth-bound applications i
 mplemented using the OPS and OP2 DSLs, evaluate different formulations in 
 SYCL, and contrast their performance to “native” programming approaches wh
 ere available (CUDA/HIP/OpenMP).\n\nTag: Performance Measurement, Modeling
 , and Tools, Performance Optimization\n\nRegistration Category: Workshop R
 eg Pass\n\nSession Chairs: Judith C. Hill (Lawrence Livermore National Lab
 oratory (LLNL)), CJ Newburn (NVIDIA Corporation), Scott J. Parker (Argonne
  National Laboratory (ANL)), and John Pennycook (Intel Corporation)\n\n
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