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DTSTART:19700308T020000
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DTSTAMP:20260422T000713Z
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DTSTART;TZID=America/Denver:20231113T145000
DTEND;TZID=America/Denver:20231113T145500
UID:submissions.supercomputing.org_SC23_sess455_misc250@linklings.com
SUMMARY:Lightning Vendor Talk:  SG2042 Empowering RISC-V in High-Performan
 ce Computing
DESCRIPTION:Liuxi Yang\n\nSophgo introduced the industry's first server-gr
 ade RISC-V CPU, the SG2042, which is helping RISC-V make strides in the hi
 gh-performance computing arena. With a 9-12 stage pipeline design, out-of-
 order execution support, and a clock speed of up to 2GHz, the SG2042 featu
 res 16 clusters, each with a maximum of 4 cores, resulting in a single SoC
  chip boasting 64 cores and 64MB of shared L3 cache. With the collaboratio
 n of industry partners, research institutions, and the open-source communi
 ty, SG2042 is accelerating the construction of the entire RISC-V software 
 stack with high-performance hardware, ranging from operating systems to ma
 thematical computing libraries.\n\nBase on the SG2042, Sophgo is soon to r
 elease the SG2044, which supports vector 1.0, and also a high-performance 
 RISC-V CPU based on SiFive IP Core. These offerings will accelerate the ad
 option of RISC-V in high-performance computing, data centers, and AI/ML sc
 enarios, with a focus on delivering high performance, low power consumptio
 n, and affordability, thereby contributing to the growth of the RISC-V HPC
  ecosystem.\n\nTag: Architecture and Networks, Hardware Technologies\n\nRe
 gistration Category: Workshop Reg Pass\n\nSession Chairs: Nick Brown (Edin
 burgh Parallel Computing Centre (EPCC); University of Edinburgh, Scotland)
 ; John Davis (Openchip); Andy Gothard (Siemens); John Leidel (Tactical Com
 puting Laboratories LLC, Texas Tech University); and Michael Wong (Codepla
 y Software Ltd, Khronos Group Inc)\n\n
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