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DTSTART;TZID=America/Denver:20231113T163000
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UID:submissions.supercomputing.org_SC23_sess458_ws_mtsa102@linklings.com
SUMMARY:GPU Graph Processing on CXL-Based Microsecond-Latency External Mem
 ory
DESCRIPTION:Shintaro Sano, Yosuke Bando, Kazuhiro Hiwada, Hirotsugu Kajiha
 ra, Tomoya Suzuki, Yu Nakanishi, Daisuke Taki, Akiyuki Kaneko, and Tatsuo 
 Shiozawa (Kioxia Corporation)\n\nIn GPU graph analytics, the use of extern
 al memory such as the host DRAM and solid-state drives is a cost-effective
  approach to processing large graphs beyond the capacity of the GPU onboar
 d memory. This paper studies the use of Compute Express Link (CXL) memory 
 as alternative external memory for GPU graph processing in order to see if
  this emerging memory expansion technology enables graph processing that i
 s as fast as using the host DRAM. Through analysis and evaluation using FP
 GA prototypes, we show that representative GPU graph traversal algorithms 
 involving fine-grained random access can tolerate an external memory laten
 cy of up to a few microseconds introduced by the CXL interface as well as 
 by the underlying memory devices. This insight indicates that microsecond-
 latency flash memory may be used as CXL memory devices to realize even mor
 e cost-effective GPU graph processing while still achieving performance cl
 ose to using the host DRAM.\n\nTag: Applications, Architecture and Network
 s, Data Movement and Memory, Heterogeneous Computing, I/O and File Systems
 , Large Scale Systems, Middleware and System Software, Performance Measure
 ment, Modeling, and Tools, Performance Optimization\n\nRegistration Catego
 ry: Workshop Reg Pass\n\nSession Chairs: Tyler Allen (NVIDIA), Ron Brightw
 ell (Sandia National Laboratories), Maya Gokhale (Lawrence Livermore Natio
 nal Laboratory (LLNL)), and Ivy Peng (KTH Royal Institute of Technology)\n
 \n
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