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DTSTAMP:20260422T000711Z
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DTSTART;TZID=America/Denver:20231117T113000
DTEND;TZID=America/Denver:20231117T115000
UID:submissions.supercomputing.org_SC23_sess459_ws_h2rc114@linklings.com
SUMMARY:Stencil-HMLS:  A Multi-Layered Approach to the Automatic Optimizat
 ion of Stencil Codes on FPGA
DESCRIPTION:Gabriel Rodriguez-Canal, Nick Brown, and Maurice Jamieson (Uni
 versity of Edinburgh, Edinburgh Parallel Computing Centre (EPCC)) and Emil
 ien Bauer, Anton Lydike, and Tobias Grosser (University of Edinburgh)\n\nT
 he challenges associated with effectively programming FPGAs have been a ma
 jor blocker in popularizing reconfigurable architectures for HPC workloads
 . However new compiler technologies, such as MLIR, are providing new capab
 ilities which potentially deliver the ability to extract domain specific i
 nformation and drive automatic structuring of codes for FPGAs.\n\nWe explo
 re domain specific optimizations for stencils, a fundamental access patter
 n in scientific computing, to obtain high performance on FPGAs via automat
 ed code structuring. We propose Stencil-HMLS, a multi-layered approach to 
 automatic optimization of stencil codes and introduce the HLS dialect, whi
 ch brings FPGA programming into the MLIR ecosystem. Using the PSyclone For
 tran DSL, we demonstrate an improvement of 14-100 times with respect to th
 e next best performant state-of-the-art tool. Furthermore, our approach is
  14-92 times more energy efficient than the next most energy efficient app
 roach.\n\nTag: Architecture and Networks\n\nRegistration Category: Worksho
 p Reg Pass\n\nSession Chairs: Jason Bakos (University of South Carolina); 
 Franck Cappello (Argonne National Laboratory (ANL), University of Illinois
 ); Torsten Hoefler (ETH Zürich, Microsoft Corporation); Kenneth O'Brien (A
 dvanced Micro Devices, Inc. (AMD)); and Christian Plessl (Paderborn Univer
 sity, Germany)\n\n
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