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Contributor

Biography
Marcel Breyer is currently a PhD student at the University of Stuttgart in the Department of Scientific Computing. After working on a performance portable implementation of a well-known algorithm in his Master Thesis, his field of research now covers a broader field of Performance Portability. This includes, amongst others, new applications of SYCL as one possibility to achieve Performance Portability between different hardware. Recently, his main focus has been a performance portable implementation of a Least Squares Support Vector Machine (LSSVM).
Presentations
Workshop
9:20am - 9:40am Monday, 13 November 2023 507
Accelerators
Artificial Intelligence/Machine Learning
Algorithms
Applications
Compilers
Data Movement and Memory
Heterogeneous Computing
Modeling and Simulation
Performance Optimization
Programming Frameworks and System Software
Runtime Systems
W
Paper
2:30pm - 3pm Thursday, 16 November 2023 403-404
Algorithms
Cloud Computing
Distributed Computing
Heterogeneous Computing
Large Scale Systems
State of the Practice
TP